Core_EDA

# Basic timing analysis

## Basic STA conception

attachment:"STA Basics.pptx"

attachment:"Corner,OCV, AOCV, POCV, LVF.pptx"

## STA lecture with notes:

attachment:"1-Overview.pdf"

attachment:"2-TCL.pdf"

attachment:"3-Control Flow.pdf"

attachment:"4-S TCL.pdf"

attachment:"5-STA concepts.pdf"

attachment:"6-Timing Lib.pdf"

attachment:"7-SDC constraints I.pdf"

attachment:"8-SDC constraints II.pdf"

attachment:"9-Setup check && Hold check.pdf"

attachment:"10-Multicycle && Half-cycle && False paths.pdf"

attachment:"11-Timing across Clock Domains.pdf"

attachment:"12-Robust Verification.pdf"

attachment:"13-Time Borrowing.pdf"

attachment:"14-data_to_data_check_summary.pptx"

attachment:"15-Clock Gating Check.pdf"

attachment:"16-Summary.pdf"

## Extra Training

attachment:"OCV, AOCV, POCV, LVF introduction (1).pptx"

attachment:"ETM introduction.pptx"

attachment:"Timer code structure overview.pptx"

## Golden Book

Timing:  attachment:"Timing.pdf"

Sta analysis for nanometer designs: attachment:"Static.Timing.Analysis.for.Nanometer.Designs.A.Practical.Approach.pdf"

[[静态时序分析圣经翻译计划]]

EDA introduction: VLSI Physical Design from Graph Partition to Timing Closure.pdf

SDC introduction: attachment:"Constraining Designs for Synthesis and Timing Analysis.pdf"

SDC introduction