EDA Traveller » History » Version 3
jun chen, 03/22/2025 12:22 AM
| 1 | 1 | jun chen | # EDA Traveller |
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| 4 | 570 |
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| 5 | 502023 session advanced group (solver 新叩D) |
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| 6 | ## Achieves before 2023 |
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| 7 | |||
| 8 | * Step n: Incremental VLSI Training QA (from web youtube, etc..) |
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| 9 | * Step n+1: Incremental VLSI Training QA from DTH |
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| 10 | * Step n+2: Giga Expert Training DDDDDDDD |
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| 11 | * Step n+n: EDA news and market link |
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| 12 | |||
| 13 | ##EDA traveller 2024 |
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| 15 | ### Group 1 computer architecture D Group winner group 1 O叩D SiQi (1500 OOD ZhiHao D 1400 O叩D |
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| 16 | LinJun and ZhengYu D 13000 |
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| 19 | |--|--|--|--| |
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| 20 | |TR_1|Processing_near_Memory_jiamin.pptx|JiaMin|TBA|DanPing| |
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| 21 | |TR_3|memory_controller_sqchen.pptx|SiQi|Prefetching_jiamin.pptx|JiaMin| |
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| 22 | |TR_4|Prefetching_II_wyxiong.pptx|WangYang|Flash_Memory_and_Sol id_State_Drivers_zhihao.pptx|ZhiHao| |
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| 23 | |TR_5|Flash_Memory_and_Solid_State_Drives_II_heng.pptx|Heng|Parallelism_and_Hetero geneity_wangyang.pptx|WangYang| |
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| 24 | |TR_6|Multiprocessor_linjun.ppt|LinJun|cache_coherence_chunyan.pptx|ChunYan| |
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| 25 | |TR_7|simd_and_gpu_architectures_bowen.pptx|Bowen|gpu_programming_keliang.pptx|KeLiang| |
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| 26 | |TR_8|virtual_memory_release_zhengyu.pptx|ZhengYu|Cache_Design_and_Management_heng.pptx|Heng| |
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| 29 | ### Group 2: Heterogeneous computing (GPU/TPU) (Group winner group 2 O叩DDD Dr. Zhuang and LePing (1400 OOD DD D 1300 O叩D Dr. Zhuang (10 00 ) |
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| 31 | 2 | jun chen | ||||| |
| 32 | 1 | jun chen | |--|--|--|--| |
| 33 | |TR_1|Parallel_Patterns_Prefix_Sum_leping.pptx|LePing|Parallel_Patterns_Sparse_Matrices_xyshi.pptx|Dr. Shi|XueYang| |
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| 34 | |TR_3|Parallel_Patterns_graph_serach_xijing.pptx|XiJing|Parallel_Patterns_Programming_Heterogeneous_Computing_Systems_with_GPU_and_other_A ccelerators_weike.pptx|WeiKe| |
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| 35 | |TR_4|Parallel_Patterns_simd_and_dynamic_parallism_hongguang.pptx|HongGuang|Parallel_Patterns_simd_and_dynamic_parallism_hongguang.pptx|HongGuang| |
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| 36 | |TR_5|GPU_software_hierarchy_qingyu.pptx|QingYu|GPU_Memory_Hierarchy_dr_zhuang.pptx|Dr. Zhuang ShiHao| |
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| 37 | |TR_6|GPU_Performance_Consideration_dr_zhuang.pptx|Dr. Zhuang ShiHao|GPU_matrix_transpose_reduction_shaobo.pptx|ShaoBo| |
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| 38 | |TR_7|Parallel_Patterns_convolution_siyan.pptx|SiYan|Parallel_Patterns_Histo gram_Computation_yingjie.pptx|YingJie| |
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| 39 | |TR_8|Advanced_Tiling_For_Matix_Multiplication_qiongzhang.pptx|Qiong|Hadoop_Architecture_and_HDFS_architecture.pptx|Hadoop_Architecture_and_HDFS_architecture_chunyan.pptx|ChunYan| |
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| 40 | 2 | jun chen | |
| 41 | ### Group 3: Chip design and EDA flow (Group winner group 3 O叩D DD (1500 OOD oo D 1400 O叩D DD (11 |
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| 42 | 00 ) |
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| 44 | 3 | jun chen | |||||| |
| 45 | 2 | jun chen | |--|--|--|--|--| |
| 46 | |TR_1|Traveller_PR_flow_v1.0_zhenming.pdf|ZhenMing|RTL_Synthesis_intro_daisy.pptx|Daisy| |
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| 47 | |TR_2|synthesis toolDDD步叩DOD (invited sharing)|ZeBang|digital_backend_physical_design_implementation_icc_huiniupptx.pptx|HuiNiu| |
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| 48 | |TR_3|A_quick_look_at_DFT_daisy.pptx|Daisy|DFT flow (invited sharing)|XinWang| |
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| 49 | |TR_4|Calibre_huiniu.pptx physical_verification1_huiniu.pptx|HuiNiu|STARRC_upload_JingLin.pptx|Jane| |
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| 50 | |TR_5|Traveller_PT_ZhenMing.pptx|ZhenMing|totem_v1.2_jiaxiao.pptx|JiaXiao| |
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| 51 | |TR_6|redhawk_JingLin.pptx|Jane|seahawk_v1.2_jiaxiao.pptx|JiaXiao| |
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| 52 | 1 | jun chen | |TR_7|K-lib_introduction_HaiAn.pptx|HaiAn|VCS_intro_Siqi_Chen.pptx|SiQi| |
| 53 | 3 | jun chen | |
| 54 | ### Group 4: Parallel computing application (Group winner group 4 O叩D DD (1100 OOD DD D 1000 O叩D 喜叩 and D0 (9 00 ) |
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| 57 | |--|--|--|--|--| |
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| 58 | |TR_1|-|-|communication_optimal_matrix_mul_xijing.pptx|Xijing| |
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| 59 | |TR_2|Sources_of_Parallelism_and_Locality_in_Simul ation_yingjie.pptx|Yingjie|An_introduction_of_Cuda_and_GPUs_shumiao.pptx|Shumiao| |
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| 60 | |TR_3|lecture08_data_parallel_algorithm_demmel22_l pwang.pptx|lePing|graph_partition_shaobo.pptx|Shaobo| |
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| 61 | |TR_4|distributed_memory_machine_and_program_qiong.pptx|Qiong|Advanced_MPI_and_Collective_Communication_Algorithm_shumiao.pptx|Shumiao| |
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| 62 | |TR_5|densela_1_parallel_mat xi_multiplication_xyshi.pptx|Dr. Shi|-|-| |
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| 63 | |TR_6|Ray_A_universal_frame work_for_distributed_co mputing_stoica22_qingyu.pptx|QingYu|Sparse_Matrix_Vector_Multiply_SpMV_and_Iterative_Solvers_bowen.pptx|Bowen| |
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| 64 | |TR_7|Dynamic_Load_Balancing_demmel22_siyan.pptx|SiYan|parallel_graph_algorithm_Siqi_Chen.pptx|SiQi| |