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EMIR New hire training » History » Version 8

jun chen, 03/22/2025 11:48 PM

1 1 jun chen
# EMIR New hire training
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# Welcome on board, new hires!
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We provide a tree-like training plan for you.
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Most of the materials are designed in <u>self-driven study</u> flavor. 
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Please check below expert-tree first, and start with level-0 lectures. 
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Good good study, day day up!
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![](clipboard-202503212327-j9ooi.png)
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# Level-0 Background and environment
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## On board environment setup.
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* Check your environment before next step on_board_check_list.pptx
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 Note: if you can't find SH printer driver, use this: Win_x64.zip or ask IT for help
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* 员叩O叩 员叩O叩2021O.pdf 0 员叩O叩2023011O.pdf
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* EMIR 叩叩叩叩  0000000000000000 (DD D田0出叩0叩程叩0叩D DD经叩叩叩加叩0叩有叩叩加D叩D叩0请叩看叩叩叩叩叩叩叩接叩
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* IT new hire training: http://10.30.200.21:8088/attachments/3632
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* Document templates (New version after 20220815) GIGA_VI_Standards
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## Refresh VLSI knowledge.
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* Step 1: Go through the briefing slide EDA_BG_Briefing.pptx Make sure you are familiar with fundamental terminologies. Try to answer the questions in the slides.
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(Hint 1: most of the answer in this book CMOS_VLSI.part1.rarCMOS_VLSI.part2.rar )
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(Hint 2: You can use FreePDK45_Giga.rar as standard cell library, and use Ngspice to setup transistor-level circuit simulation.)  
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* Step 2: Hand out your answers to tutor, you are welcomed to raise new questions to us.
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* Next step: EDA_Traveller
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## Get ready to survive in Linux world0 A quick start EDA journey.
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* Please follow Survive_linux to learn how to survive in GIGA Linux environment.
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* Please follow Setup_linux to setup / restore / reset your linux VNC development environment, and run quick start EDA.
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* Checkout Quick_shell.docx, make sure you are familiar with Linux shell command...
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* home directory and VNC upgrade procedure (2023/12/17)
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## Giga IT guide map.
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800
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## Advanced C++ topic.
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* Giga uses make file to organize source code. Checkout tutorial attachment:"Usage_of_Makefile.pptx" (JiaXiao Qin, 2020/08/26)
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* Debug and profiling skills, please visit http://10.30.200.21:8088/projects/hongtu-emir/wiki/Debugging_and_profiling_tech (JiCun Li, 2020/08/26)
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* how to use lambda expression. Check tutorial attachment:"lambda_expression.pptx" (JiaXiao Qin, 2021/05/21) 
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* Tcl usage and coding from scratch attachment:"Tcl.h简单指令pre_leping.pptx" (LePing Wang, 2022/03/18)
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* Learn modern C++ features: https://github.com/changkun/modern-cpp-tutorial
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--------------------------------------------------
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# Level-1 EDA flow and play with Aguda
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## The BIG picture of EDA flow and Aguda EDA lab {For new environment)
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* Read through Verilog to manufacture lecture, so you can get the big picture of EDA flow, and play with a tiny chip case.  
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* Read through EMIR sign-off basics: SoCDDDDO叩D.docx (From DD谈加)
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## The BIG picture of Vulcan Power and VP manual {For new environment)
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* Please check http://10.30.200.21:8088/projects/hongtu-emir/wiki/New_hire_training(PV_PE_AE) , "VP introduction" section.
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* Please follow "D叩叩DO叩" on the main functions of VP
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--------------------------------------------------
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# Level-2 Time to become EDA RD
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( * DDDDDDDDDDDD make !!!! D00D bsub / vp_make / ag_make / cht_make * ) 
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( * DDDDDDDDDDDD make !!!! D00D bsub / vp_make / ag_make / cht_make * )
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( * DDDDDDDDDD git push!!!! DODD vp_commit 执D叩叩叩 00D00D vp_push / ag_push / cht_push * )
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( * DDDDDDDDDD git push!!!! DODD vp_commit 执D叩叩叩 00D00D vp_push / ag_push / cht_push * ) 
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( * □□□DD /rnd1/jchen/newhire_training/util_scripts *)
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![](clipboard-202503212347-wu2ne.png)
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## Development flow, an issue cycle
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* How to Create repository (建叩本叩DODD)
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* RD cycle flow check_in_flow_regression_new.pptx ,
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  Learn how to get issue, fix, test, verify, review, and submit change. 
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  Run below script to see check-in guidance ( Thanks to 杜田D )
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```
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	/rndl/llchen/newhire—training/util—scripts/vp—commit
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```
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* About git:
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Learn git within one hour (why rebase? how to merge, reset, revert?) attachment:"git_in_one_hour.docx"
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Simple git flow introduction and some common issues when using git (contributed by 陈田奇) attachment:"git_simple_intro.pptx" 
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Get used to git branch operation (contributed by 周田邦) https://learngitbranching.js.org/
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Use gitk to trace changes and commits (you may also use gigacode diff) (contributed by 熊叩安)
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* About regression and utility system
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See details in http://10.30.200.21:8088/projects/hongtu-emir/wiki/VP_QA_(regression)_
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The official Redmine issue flow: http://10.30.200.21:8088/projects/it-infrastructures/wiki/Redmine_User_Guide
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## Useful tools {under /rnd1/jchen/newhire_training/util_scripts )
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```
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vp_hello	// show usage and help message
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vp_newhire	// setup environments during on-board day
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vp_new	        // vp—checkout + vp—make check out code from server and build AG/VP/C日T
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vp_checkout     // check out latest code from gitlab server
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vp_clean        // clean up binary (make clean)
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vp_make         // build VP binary, or...
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                      vp_make ir pow            // will make ir and pow module as debug version
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                      vp_make ir VERBOSE        // will enable verbose message during compile
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                      vp_make pow ta FORCE      // will call a machine and force compile, if resource is limited
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ag_make	        // build AG binary, or...
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	        // usage is same as vp—make
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cht_make	// build CHT binary 
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	        // usage is same as vp—make
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rs_make	        // build RS binary
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vp_sync/ag_sync/cht_sync	// get latest code from server, and refresh ctags
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vp_sync_force   // 髻 强伲merge conflict叩叩且叩正叩交叩 
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vp_regression   // run VP regression suite under your client (M-ST do for functional check-in flow)
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cht_regression  // run C日T regression suite
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ag_regression   // run AG regression suite under your client (M-ST do for functional check-in flow)
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ag—regression clean  髻 cleanup local regression data, same as "vp—regression clean" 
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vp—commit	//print check-in flow guidance
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vp—push	        // perform sync-up, AG/C日T/VP build, run simple check, and push your code to gitlab server
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vp—revert	// a simple guidance if you want to give-up change, or solve conflict... 
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ut—push	        // push changes for ut case, will do --rebase
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VP—cut—build	// how to build cut release to AF  (commit id in etc/ci—log)
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```
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Note: If vp_sync or git pull failed with "You are not currently on a branch" try to use git checkout hongtu to recover branch info.
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## RD IDE related
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[[xterm]] By ZhengYu
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vim By JiCun
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Speed-up vim By PengCheng, Dr. Liu 
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vscode By DanPing
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Setup shell alias and git config (毛麾, etc. )
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## Coding Giga !
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* How to update help message DOD叩叩更D 庄叩D ver. 叩 DODO叩OD叩叩叩叩D_Dr_Zhuang_Ver.pptx 
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Dr. Zhuang's Comment:
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□□叩option或叩function叩叩对叩 23-25 页叩内叩 
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22页伲man库叩叩叩。叩们叩前叩操叩是叩叩叩本叩后叩更□叩叩push叩GerritD  review
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* How to update man page : man_page_guide_20240108.pdf  
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* Check overall code structure with slides Code_overview.pptx
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* Check the general command interface (C, Tcl, Python) with slides add_new_commands.pptxadd_python_command.pdf  
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* Check the command interface (C implementation) with slides VP_cmd_interface.pptx
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* Check how to read and debug and profile GIGA code (basic version) Read_debug_giga_code_1.pptx 
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![](clipboard-202503212349-xrvlj.png)
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More details in http://10.30.200.21:8088/projects/hongtu-emir/wiki/Coding
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More debug details in http://10.30.200.21:8088/projects/hongtu-emir/wiki/Debugging_and_profiling_tech
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## Timing Analysis New Hire Training
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* Check timing background and materials in http://10.30.200.21:8088/projects/hongtu-sta/wiki  
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* The timing analysis basic introduction I VLSI_ta_p376_386.pptx
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* The timing analysis basic introduction II VLSI_ta_practical.pptx
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* STA 0经叩D (by Daisy Li)
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![](clipboard-202503212348-q7fc5.png)
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## Power Analysis
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* Check power background slides I and II EDA_PA_basic_I.pptx  
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* Power analysis training lab guidance (TBD.)
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* Advanced power analysis background: http://10.30.200.21:8088/projects/hongtu-emir/wiki/Power_analysis
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* Low power design flow: http://10.30.200.21:8088/projects/hongtu-emir/wiki/Low_power_design_flow_and_training
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## GUI and UI
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* All about TCL, UI, GUI: http://10.30.200.21:8088/projects/understand-aguda/wiki/Aguda_GUI
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* TCL new-hire training:  http://10.30.200.21:8088/projects/understand-aguda/wiki/New_hire_checklist
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## RC Extraction New Hire Training:
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* Check Main Page: http://10.30.200.21:8088/projects/understand-aguda/wiki/Understand_LPE
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## PR Related New Hire Training:
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*  Check New-hire page: http://10.30.200.21:8088/projects/understand-detailed-placement/wiki/New_hier_related
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## Logic Synthesis New Hire Training:
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* Check Main Page: http://10.30.200.21:8088/projects/hongtu-logicsynth/wiki
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* New training page: http://10.30.200.21:8088/projects/hongtu-logicsynth/wiki/Wiki
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## Level-3 Core engine and math
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 Please check Advanced_EM-IR_Center , these are core math ideas behind Giga core engine!□