Core_EDA

# Power analysis

## [[SDP power analysis]]

## [[Usage model]] {also debug, annotation, correlation methods)

## [[Debugging skill]]

## [[Power save restore cache]] 

## [[USDB support]]

## Pre-request

* Make sure you have already familiar with VP usage model:  [[New_hire_training(PV_PE_AE)]]

## Glitch and switching activity

* Check power analysis on switching activity EDA_PA_basic_lll.pptx

* Check glitch power optimization in detail GlitchPower_Optimization.pptx

700 

## Simple QA

* Why internal power is negative (From D叩D叩D https://www.cnblogs.com/lelin/p/11412133.html  

* TCl beginner's manual Tcl_basic_command.pptx

* "extract_toggle_activity -format saif -file file.saif" command for Pin setting logic (From D叩D叩 extract_toggle_activity.docx  "report_toggle_activity" random crash fix experience (From D叩D叩 report_toggle_activity.docx

* About VCD background vcd.pptx

* debug utility with sanity check on TR, SWA, pow

```

// obsolete

set_app_var ta debug_power 2

// new usage

set_app_var pow debug 20

// will perform sanity check 

report_power_analysis 

// will show calculation procedure 

report_power_calculation

```

* Debug power issue from RS side: {DD RS DD RS RocSyn 相叩)

Step 0: follow this link to build local RS repository:

http://10.30.200.21:8088/projects/hongtu-emir/wiki/TOP_NEWS_%E4%B8%B4%E6%97%B6%E7%BD%AE%E9%A1%B6编田和叩行叩辑叩DDDRocSyn (选叩branch syn_dev): http://10.30.200.21:8088/projects/hongtu-logicsynth/wiki/Build_Run

Steo 1: setup golden RS and environment:

**NOTE: <u>after fix, copy fix to hongtu branch repository and submit</u> {RS will regularly move code from hongtu to syndev branch)**

如田碰叩license 问叩D叩D ~yzsun/.cshrc_user D叩D 

髻 central RS build:

/ci—builds/syn—opt—rhel6/latest/bin/rhel6-64/RS

髻 Or, you can use alias from /rndl/llchen/newhire—training/envsetup/.cshrc—user

髻 and run below command to get local link to latest RS build

getRS

髻 Set necessary environment: setenv SYN—PV—PAT: /reg/db/rocsyn

髻 Most of the RS tickets in

/rndl/issues/ticket—number

* SWA default valueD

defaultDsignal toggle rate D 0.1 clkDD 2

DDDDtoggle rateDDD set_app_var ta power_default_signal_toggle_rate 0.1 叩DDDDDD叩 

DDDDDDDDDDDDDDD叩D 

set—switching—activity -clear

set—switching—activity -clock—net -number—of—toggles 2 -period—of—clock 2 

set—switching—activity -signal—net -number—of—tiggles 0.l5 -period—of—clock 2

## Switching activity, glitch algorithm paper

 1991_Najm_Transition delay, a new measure of activity in digital circuits.pdf

 1994_Chou_Estimation of Circuit Activity Considering Signal Correlations and simultaneous Switching.pdf  

1994_Kappor_lmproving the Accuracy of Circuit Activity Measurement.pdf

 1997_Lim_a statistical approach.pdf

 1999_hashimoto_a practical gate resizing technique considering glitch reduction for low power design.pdf  

2006_Lamoureux_Activity Estimation for Field-Programmable Gate Arrays.pdf

## Liberty Power Calculation {Jeff)

 Giga-DA Liberty Power Calculation.pptx  Giga-DA NLPM Calculation.pptx

## High-level power estimation