RC parasitic extraction and LPE¶

ESD¶

□5田0片0叩D叩陈叩□ 博叩～0

ESD background introduction: Giga_DA_ESD_Models_Devices_and_Analysis.pptx ESD reference paper: ming-douker1999.pdf (From Dr. Shi)

ESD reference paper: 02_Simulating_Electrostatic_Discharge.pdf (From Jeff)

ESD online training: https://www.bilibili.com/video/BV1C34y1p7Jk?share_source=copy_web&vd_source=d04eb1abca6ba586bf0375f4ee96ad31 (From Dr. Chen)

LVS¶

LVS introduction: http://10.30.200.21:8088/projects/hongtu-emir/wiki/LVS_introduction

Resistance and capacitance¶

Professional link (By Xu): http://10.30.200.21:8088/projects/understand-aguda/wiki/Understand_LPE Professional introduction (By Xu): http://10.30.200.21:8088/projects/understand-aguda/wiki/LPE_Basic

Cap and resistance introduction¶

Background knowledge (where cap comes from): ECE4121Lec08Wire.pdf , CapacitanceDrivingaLoadannotated.pdf IR analysis cap contributor: about_cap_clean.pptx
Resistance usage model and background: Resistance_analysis_and_report.pptx

Chip_RC_Correlation¶

Regression and QA method¶

Regression location: ut/tests/ut/vp/ir/resistance
Regression command 1: qa_report_pg_resistance
Regression command 2: qa_report_detail_regression
Regression command 3(obsolete): qa_analyze_power_network res golden_res_file test_res_file

Effective resistance¶

New usage

analyze—pg—resistance -net VDD -effective  [-generate—supply—location (hidden option)]
髻 by default, 10 worst instance will be reported. if -number—of—worst set to 0 or negative, report
 all
report—pg—resistance -net VDD -effective [-number—of—worst 10] report—pg—resistance -net VDD cell—name -effective
髻 will dump all the result to file
report—pg—resistance -net VDD -effective -number—of—worst 0 -output—file xxx.rpt
髻 will show heat map in G·r without re-build graph show—effective—resistance—map 
髻 below error out since -detail only support in min-path mode report—pg—resistance -net VDD cell—name -detail

Old usage:

set—app—var ir calc—resist—mode Fl.AT
analy江e—power—network -net VDD -res—only [-generate—supply—location] 
report—power—network -net VDD -type res

Min-path resistance¶

New usage

analy江e—pg—resistance -net VDD  [-generate—supply—location (hidden option)]
髻 by default, 10 worst instance will be reported. if -number—of—worst set to 0 or negative, report all
report—pg—resistance -net VDD [-number—of—worst 10] report—pg—resistance someCell -high—light -detail -net VDD

髻 will dump all the result to file
report—pg—resistance -net VDD -number—of—worst 0 -output—file xxx.rpt
髻 will show up heat map in G·r, power min-path, ground min-path, total min-path will display
髻 if a cell is not connected to power/ground, the color annotation will be skiped. rn the total re sistance calculation, the un-connected net res is regarded as 江ero.
show—min—path—resistance—map 

Old usage:

set—app—var ir calc—resist—mode S:ORTPAT:
analy江e—power—network -net VDD -res—only [-generate—supply—location] report—power—network -net VDD -type res -inst xxx -high—light report—power—network -net VDD -type res -path—number 4

Debug pg resistance¶

See Generic testing SoP:
http://10.30.200.21:8088/projects/hongtu-emir/wiki/Generic_Testing_SoP#section-10

Open-short and missing via check¶

verify—power—network 
check—pg—vias

1. :VP O 叩 check—pg—vias D叩D叩D叩D叩D叩D叩missing viaD
   get—ob“—attr [get—violations -checker pgroute] bbox
2. :VP O 叩 verify—power—network D叩D叩D叩D叩D叩D 叩 open/short/floating (open D叩D )D
   get—ob“—attr [get—violations -checker layout—verifier -filter—by {rule == open}] bbox

Regression location¶

ut/tests/ut/vp/ut_run/ir/resistance/xxx

VIA resistance (TBD.)¶

analy江e—via—resistance

compare resistance by layer¶

DDDDD D min-path D叩D叩D叩D叩叩叩D叩度叩0叩D叩D叩D叩D叩D叩叩叩总叩叩叩叩叩映叩D叩导叩ir叩叩叩em叩叩叩
D 叩D叩D叩DD叩D叩叩叩叩res改叩就叩须叩D static irDDDDDD叩DDDDDD叩DD希叩□ :VP D Ref tool D detail res 门叩叩叩叩叩D叩D叩

DDD□ :VP D Ref tool D min res detail path门叩叩叩叩叩D叩叩并叩D叩叩叩叩叩

D叩D
compare—detail—path—resistance -input—file minPath.rk [-output—file compare.result] [-plot—scatter
]

□叩flowD
...
set—app—var ir save—graph true analy江e—pg—resistance
compare—detail—path—resistance -input—file minPath.rk -output—file compare.result
DDDinput_fileDredhawkOmin resistance detail path report, D叩DD叩

output_fileDDDDDDODDDDDD叩DD叩

DDDD-plot_scatterDDDDDDDDD田叩

RC extraction¶

500
LPE_Lecture_and_Reference

About rlc model¶

RCGEN_USAGE.pdf (from XuLuo 20230905)

Base method (Obsolete)¶

DDDD layer D DD叩叩DDDDDDD叩叩叩DD 叩 (DD D rlc DODD )
1.D叩 1叩set—linear—unit—rlc (DD叩叩叩叩叩叩D导叩叩叩DD候 叩 unitR / width * length
D DDDDD叩DDDDDDDDD叩D叩叩叩叩DDD叩DDDDDDDDDDD
2.D叩 2叩 set—resistance—table (DODDD伲插叩叩 叩 叩D导叩叩叩DD候 叩 lpm->CalcMetalR叩叩DD导叩叩叩
D DD叩DD叩叩DD叩D叩D叩DDD
D叩 1DDD叩D叩DD signoff emirDD叩DDD叩D叩 2DD叩

Advanced method: (New engine from Xu, after 20220310)¶

See: http://10.30.200.21:8088/issues/7418
first phase changes:
1.ir rc_multi_threads 1: valid in "ir rc_mode 2", changed to on by default
2.ir rc_keep_pg_only 0: valid in "ir rc_mode 2", new, off (high accuracy) by default, will be on (medium accuracy, aligned with RH, equivalent to internal param "ir rc_ignore_mode 0x248") controled by other new coming ir params (like "ir accuracy_level high", will be followed up by Jun)
3.ir rc_mode 0/1/2: 0 existing auto-mode, will be retired, 1 forcedly unitR/C, 2 exact RC extraction like signal (will be on by default for signoff VP, followed up by Jun), no further change for now.

todo list:
1.px dont_extract_cap 1: on by default for static IR-drop analysis if "ir rc_mode 2" is set
2.new ir param (e.g., accuracy_level medium [ I low I high]), to be discussed with Jun to turn on below params:

low:
ir rc_mode 1

medium:
ir rc_mode 2
ir rc_keep_pg_only 1

high:
ir rc_mode 2
ir rc_keep_pg_only 0
3.change default value for below two params:
3.1param "ir rc_keep_pg_only_tv 1" : change default from 0 to 1 for thickness variation.
3.2param "ir rc_keep_pg_only_cap 1": change default from 0 to 1 for cap weighting factor.