Core_EDA

# SPICE TEAM

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## Some tips for piece(Ngspice) user (by Kramer)

For the hspice or other spice user, in-house spice simulator piece has many triky usags and I list some of them here.

1. About easurement

Both meas line at control block and outside of control block are supported, but both cannot support any complex expression as below

```

.meas tran vtest find par('v(n1)-v(n0)') at=40n

.meas tran ttest when v(n1) = 'v(0)+vdd'

```

The right way is

```

.control

let vdiff = v(n1)-v(n0)

let vtest = v(0)+vdd

meas tran vtest find vdiff at=40n

meas tran ttest when v(n1) = vtest

.endc

```

There are more useful measurement statements for example.

```

.control

* rhs of let statement cannot use the golbal parameter outside of control block while vdd is a special case!

let halfvdd = 'vdd/2'

let trans = {v(q)*v(cp)/vdd}

meas tran tran01 when tranx = 'halfvdd' rise=1

meas tran delay1 trig v(in) val='halfvdd' fall=1 targ v(zn) val = 'halfvdd' rise=1

print tran01 delay 1 > trans.txt

.endc

```

2. some useful options

```

.opt noopac  ; skip op when do ac analysis

.opt numdgt=9 ; set the output data's digital number to 9 (must set in control block, as *.control numdgt=9 .endc*)

*#set nobreak ; set output data file without page break

.opt maxord=1 method=trap trtol=1  ; options to get stable waveform without some ring (more accuracy)

```

The following lines to set autostop when v(zn) cloase to zero

```

.opt autostop

.meas tran tend when v(zn)='vss+1e-5' fall=1

```

3. about output file format

In control block, we can use print or wrdata to dump data to file.

```

print i(vp) i(cl_t) v(q) > dat1.txt

wrdata dat2.txt i(vp) i(cl_t) v(q)

```

The dat1.txt(left) and dat2.txt(right) as below:

![](clipboard-202503070017-nfx2n.png)

4. alter usage

Wrong usage for altering C1's capacitance:

```

C1 1 0 'cload'

.control

alter C1=1p

tran 1p 10n

alter C1=1.2p

tran 1p 10n

.endc

```

The right way as below, in the above case, the latter simulation will be impacted by the former.

```

c1 1 0 'cload'

.control

alterparam cload = 1p

reset

tran 1p 10n

alterparam cload = 1.2p

reset

tran 1p 10n

.endc

```

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## Development Environment:

New spice engine "piece" is located in pub2018/bin/rhelx-64/analog. (2021/7/12 historical moments!!!)

piece update can flow below procedure [[Tool_lib_organization]]

## 

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## Reference SPICE center (Repository in 10.30.100.22/spice)

## **ngSPICE**

> Reference:  http://ngspice.sourceforce.net/docs.html

> User manual:  attachment:"ngspice-34-manual.pdf"

> Binary and library install guidance:  attachment:"ngspice_install.pptx"

> ngspice git clone: `git clone ssh://git@10.30.100.22:222/analog/spice.git`

> Local build binary with ngSpice 34: `/rnd1/jchen/ngspice34/agigaspice/release/bin/bin/ngspice`

> Example spice file: `/rnd1/jchen/ngspice34/agigaspice/examples`

> [[Ngspice compiling method enhancement]] (SiQi)

## **spice3f5 元祖SPICE**

> attachment:"spice3f5.tar.gz"

## **cuSPICE, (CUDA ver. ngSPICE)**

> attachment:"CuSPICE.pdf"

> Reference: SPICE on GPU:  http://ngspice.sourceforge.net/cuspice.html

## **xyce** 

> Xyce install method (Langyun):   attachment:"基于WSL的Ubuntu系统Serial Xyce编译整理.docx"

> Reference: https://xyce.sandia.gov/

##  **SPICE 历史** 

> attachment:"SPICE_history.docx"