Core_EDA

# Timing Analysis

## [[Basic timing analysis]]

## [[Delay calculation and SI]]

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## Selected Papers

### Delay

attachment:"AWE.pdf"

attachment:"RICE Rapid Interconnect Circuit Evaluation Using AWE.pdf"

attachment:"Zeros and Passivity of Arnoldi-Reduced-Order Models for Interconnect Networks.pdf"

attachment:"A rank-one Update Method for Efficient Processing of Interconnect Parasitics in Timing Analysis.pdf"

attachment:"A Coordinate-Transformed Arnoldi Algorithm for Generating Guaranteed Stable Reduced-Order Models of RLC Circuits.pdf"

attachment:"Blade and Razor Cell and Interconnect Delay Analysis Using Current-Based Models.pdf"

### Timing graph

attachment:"Timing Analysis with known False Sub Graphs.pdf"

### SI

attachment:"a robust cell-level crosstalk delay change analysis (celtic) (1).pdf"

attachment:"Improved crosstalk modeling with application to noise constrained interconnect optimization (2Pi model).pdf"

attachment:"Victim Alignment in Crosstalk-Aware Timing Analysis .pdf"

attachment:"Practical Considerations in RLCK Crosstalk Analysis for Digital Integrated Circuits (virtual_attacher).pdf"

### MCMM

attachment:"A Timing Graph Based Approach to Mode Merging.pdf"

### SSTA

attachment:"A Parametic Approach for Handling Local Variation Effects in Timing Analysis.pdf"

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## Presentations